The present invention relates to semiconductor devices for data processing in which a memory with an error correcting function is mounted, and more particularly to technology for multi-processor systems which perform image processing.
One method of preventing unwanted change in stored data due to cosmic rays, etc. is to add an error correcting function using an error correcting code to the memory. An example of the use of an error correcting function in a memory is given in Japanese Unexamined Patent Application Publication No. 2008-139908. In order to implement a function to correct an error of 1 bit, it is necessary to add an error correcting code of 8 bits. Therefore, when an error correcting code is used, the memory capacity must be increased to compensate for the additional memory required for the error correcting code. For example, in the case of image recognition or speech processing in which a large volume of data is entered and sequentially processed repeatedly, if the error correcting function is applied to all data storage areas, the data storage capacity would have to be increased excessively and the access speed would decrease. Conversely, if the error correcting function is not applied at all, the reliability of data processing would decline. One solution to this problem may be that one memory area has an error correcting function and the other memory area does not have an error correcting function as described in Japanese Unexamined Patent Application Publication No. 2008-139908.